FPGA Design Engineer | Quantum Computing

Netherlands · Hybrid · Expected salary €80,000–€85,000

How do you control and read out hundreds of qubits in parallel when a few nanoseconds matter? I’m recruiting an FPGA Design Engineer to help solve that problem by building the digital hardware behind large-scale quantum computers.

You’ll design RTL for a distributed control system where timing, synchronisation and communication between devices are central to the job. Your work will help determine how precisely the system can control qubits and how reliably it can read them out as the system scales.

What you’ll work on

  • Design and verify FPGA logic for parallel qubit control, readout and communication between devices.

  • Tackle nanosecond-level synchronisation across a distributed hardware system.

  • Own FPGA design work from RTL implementation through verification and debugging.

  • Work with engineers across digital design, electronics and software to integrate your logic into the wider system and shape technical decisions.

What I’m looking for

  • Hands-on FPGA design experience and confidence writing synthesizable RTL in VHDL, Verilog or SystemVerilog.

  • Experience verifying and debugging digital designs through simulation or on hardware.

  • A solid grasp of digital design fundamentals, including clocking, timing and interfaces.

  • An interest in taking ownership of complex design work and seeing it run on real hardware.

If you’ve worked on timing-sensitive FPGA designs in areas such as telecommunications, RF, instrumentation or high-speed data acquisition, I’d be interested in hearing about a design you owned and the hardest problem you had to solve.

Apply with your CV or get in touch for a confidential conversation about the role.

Curtis Holben
DeepRec.ai